Method of fabricating a deep trench (DT) metal-insulator-metal (MIM) capacitor
US8241981B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2011 |
| Grant date | Aug 14, 2012 |
| Priority date | — |
| Expiry date | Jan 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/37
Abstract
A method includes providing an SOI substrate including a layer of silicon disposed atop a layer of an oxide, the layer of an oxide being disposed atop the semiconductor substrate; forming a deep trench having a sidewall extending through the layer of silicon and the layer of an oxide and into the substrate; depositing a continuous spacer on the sidewall to cover the layer of silicon, the layer of an oxide and a part of the substrate; depositing a first conformal layer of a conductive material throughout the inside of the deep trench; creating a silicide within the deep trench in regions extending through the sidewall into an uncovered part of the substrate; removing the first conformal layer from the continuous spacer; removing the continuous spacer; depositing a layer of a high k dielectric material throughout the inside of the deep trench, and depositing a second conformal layer of a conductive material onto the layer of a high-k dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.