Metal-insulator-metal structure for system-on-chip technology
US8242551B2 · kind B2 · utility
5Cited by
14References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2009 |
| Grant date | Aug 14, 2012 |
| Priority date | — |
| Expiry date | Jul 31, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
The present disclosure provides a semiconductor device that includes a semiconductor substrate, an isolation structure formed in the semiconductor substrate, a conductive layer formed over the isolation structure, and a metal-insulator-metal (MIM) capacitor formed over the isolation structure. The MIM capacitor has a crown shape that includes a top electrode, a first bottom electrode, and a dielectric disposed between the top electrode and the first bottom electrode, the first bottom electrode extending at least to a top surface of the conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.