Patent · US Active

Normalizer shift prediction for log estimate instructions

US8244783B2 · kind B2 · utility

6Cited by

4References

12Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Maarten J. Boersma · Holzgerlingen, DE
Michael Klein · Schenefeld, DE
Jochen Preiss · Eppelheim, DE
Son Dao Trong · Stuttgart, DE

Key dates

Filing date	Sep 11, 2008
Grant date	Aug 14, 2012
Priority date	—
Expiry date	Jan 27, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F7/74
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A floating point processor unit includes a shift amount calculation circuit within a normalizer portion of the floating point unit, wherein the shift amount calculation circuit is utilized to compute the normalizer shift amount for a log estimate instruction that runs as a pipelinable instruction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.