Inventor · Eppelheim, DE

Jochen Preiss

19Patents
5h-index
25Co-inventors
58Inventor score

Filing activity: Feb 11, 2005 → Jan 1, 2013

Most-cited inventions

PatentTitleAreaCited byStatus
US7694112B2 Multiplexing output from second execution unit add/saturation processing portion of wider width intermediate result of first primitive execution unit for compound computation Physics 38 Active
US7461117B2 Floating point unit with fused multiply add and method for calculating a result with a floating point unit Physics 18 Active
US8291003B2 Supporting multiple formats in a floating point processor Physics 9 Active
US8244783B2 Normalizer shift prediction for log estimate instructions Physics 6 Active
US7996738B2 Semiconductor chip with a plurality of scannable storage elements and a method for scanning storage elements on a semiconductor chip Physics 5 Active
US8578196B2 Zero indication forwarding for floating point unit power reduction Emerging Cross-Sectional Technologies 4 Active
US8407275B2 Fast floating point compare with slower backup for corner cases Physics 4 Active
US8346828B2 System and method for storing numbers in first and second formats in a register file Physics 3 Active
US8255726B2 Zero indication forwarding for floating point unit power reduction Emerging Cross-Sectional Technologies 2 Active
US8352531B2 Efficient forcing of corner cases in a floating point rounder Physics 2 Active
US8566383B2 Distributed residue-checking of a floating point unit Physics 2 Active
US7735038B2 Design structure to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit Electricity 1 Active
US7639046B2 Method to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit Electricity 1 Active
US8332453B2 Shifter with all-one and all-zero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result Physics 0 Active
US8626807B2 Reuse of rounder for fixed conversion of log instructions Electricity 0 Active
US8370409B2 Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing Physics 0 Active
US8756263B2 Binary logic unit and method to operate a binary logic unit Physics 0 Active
US8032854B2 3-stack floorplan for floating point unit Physics 0 Active
US8452824B2 Binary logic unit and method to operate a binary logic unit Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.