Mapping address table maintenance in a memory device
US8250333B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2009 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Nov 6, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system maintains an address table for mapping logical groups to physical addresses in a memory device. The method includes receiving a request to set an entry in the address table and selecting and flushing entries in an address table cache depending on the existence of the entry in the cache and whether the cache meets a flushing threshold criteria. The flushed entries include less than the maximum capacity of the address table cache. The flushing threshold criteria includes whether the address table cache is full or if a page exceeds a threshold of changed entries. The address table and/or the address table cache may be stored in a non-volatile memory and/or a random access memory. Improved performance may result using this method and system due to the reduced number of write operations and time needed to partially flush the address table cache to the address table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.