Methods of fabricating semiconductor devices and structures thereof
US8252649B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2008 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Jun 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a workpiece having a first region and a second region. A composition or a thickness of at least one of a plurality of material layers of the gate material stack is altered in at least the second region. The gate material stack is patterned, forming a first transistor in the first region and forming a second transistor in the second region. Altering the composition or the thickness of the at least one of the plurality of material layers of the gate material stack in at least the second region results in a first transistor having a first threshold voltage and a second transistor having a second threshold voltage, the second threshold voltage having a different magnitude than the first threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.