Transistors with multilayered dielectric films and methods of manufacturing such transistors
US8252674B2 · kind B2 · utility
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9References
27Claims
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Key dates
| Filing date | Aug 2, 2011 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Aug 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.