Method and system for verification of multi-voltage circuit design
US8255859B2 · kind B2 · utility
1Cited by
8References
17Claims
0Family size
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Key dates
| Filing date | May 18, 2009 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Jun 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Multi-voltage circuit design verification segregates design elements into iso-voltage-rail blocks. Information on cross-over connections between the iso-voltage-rail blocks is obtained. Voltage effects are simulated in the circuit design, and, based on the cross-over information, the simulation results are modified. This yields more accurate results of simulations for multi-voltage circuit designs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.