Semiconductor package and multichip arrangement having a polymer layer and an encapsulant

US8258633B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Recai Sezi · Simmerath, DE
• Thorsten Meyer · Regensburg, DE

Key dates

• Filing date: Mar 31, 2010
• Grant date: Sep 4, 2012
• Expiry date: Aug 27, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3511
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A polymer layer is generated on a wafer. The wafer is then separated into semiconductor chips. At least two semiconductor chips are placed on a carrier with the polymer layer facing the carrier. The at least two semiconductor chips are covered with an encapsulating material to form an encapsulant. The carrier is removed from the encapsulant, and the encapsulant and the polymer layer are thinned.