Memory device with band gap control

US8264864B2 · kind B2 · utility

Assignee

• UNITY SEMICONDUCTOR · US

Inventor

• Rene Meyer · Atherton, US

Key dates

• Filing date: Dec 18, 2009
• Grant date: Sep 11, 2012
• Expiry date: Jun 21, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B63/84

Abstract

A memory device with band gap control is described. A memory cell can include a conductive oxide layer in contact with and electrically in series with an electronically insulating layer. A thickness of the electronically insulating layer is configured to increase from an initial thickness to a target thickness. The increased thickness of the electronically insulating layer can improve resistive memory effect, increase a magnitude of a read current during read operations, and lower barrier height with a concomitant reduction in band gap of the electronically insulating layer. The memory cell can include a memory element that comprises the conductive oxide layer and the electronically insulating layer and can optionally include a non-ohmic device (NOD). The memory cell can be positioned in a two-terminal cross-point array between a pair of conductive array lines across which voltages for data operations are applied. The memory cell and array can be fabricated BEOL.