Integrated circuit having an array supply voltage control circuit
US8264896B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2008 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Sep 26, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprises a plurality of memory cells and an array supply voltage control circuit. The plurality of memory cells are organized in rows and columns. A row comprises a word line and all of the memory cells coupled to the word line. A column comprises a bit line pair and all of the memory cells coupled to the bit line pair. The array supply voltage control circuit is coupled to the plurality of memory cells. The array supply voltage control circuit is for receiving a power supply voltage and for providing a reduced power supply voltage to memory cells of a selected column during a write operation in response to a voltage differential on the bit line pair of the selected column.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.