Etch process for reducing silicon recess
US8268184B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2010 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Sep 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/32724
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for selectively etching a substrate is described. The method includes disposing a substrate comprising a silicon nitride (SiNy) layer overlying silicon in a plasma etching system, and transferring a pattern to the silicon nitride layer using a plasma etch process, wherein the plasma etch process utilizes a process composition having as incipient ingredients a process gas containing C, H and F, and an additive gas including CO2. The method further includes: selecting an amount of the additive gas in the plasma etch process to achieve: (1) a silicon recess formed in the silicon having a depth less than 10 nanometers (nm), and (2) a sidewall profile in the pattern having an angular deviation from 90 degrees less than 2 degrees.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.