Semiconductor device comprising eFUSES of enhanced programming efficiency
US8268679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2009 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Aug 8, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In sophisticated integrated circuits, an electronic fuse may be formed such that an increased sensitivity to electromigration may be accomplished by including at least one region of increased current density. This may be accomplished by forming a corresponding fuse region as a non-linear configuration, wherein at corresponding connection portions of linear segments, the desired enhanced current crowding may occur during the application of the programming voltage. Hence, increased reliability and more space-efficient layout of the electronic fuses may be accomplished.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.