Methods for fabricating FinFET semiconductor devices using planarized spacers
US8268727B2 · kind B2 · utility
11Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2009 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Jun 28, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating a semiconductor device on and in a semiconductor substrate are provided. In accordance with an exemplary embodiment of the invention, one method comprises forming a sacrificial mandrel overlying the substrate, wherein the sacrificial mandrel has sidewalls. Sidewall spacers are formed adjacent the sidewalls of the sacrificial mandrel, the sidewall spacers having an upper portion and a lower portion. The upper portion of the sidewall spacers is removed. The sacrificial mandrel is removed and the semiconductor substrate is etched using the lower portion of the sidewall spacers as an etch mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.