Patent · US Active

Variable impedance memory device having simultaneous program and erase, and corresponding methods and circuits

US8274842B1 · kind B1 · utility

13Cited by

10References

15Claims

0Family size

Assignee

Adesto Technologies Corporation · US

Inventors

Shane Hollmer · Grass Valley, US
Nad Edward Gilbert · Gilbert, US
John Dinh · Dublin, US

Key dates

Filing date	Sep 25, 2009
Grant date	Sep 25, 2012
Priority date	—
Expiry date	Sep 25, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG11C2213/79
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit may include: access circuits that couple first electrodes of a plurality of programmable metallization cells (PMC) to access paths in parallel, each PMC comprising a solid ion conducting material formed between the first electrode and a second electrode; a plurality of write circuits, each coupled to a different access path, and each coupling the corresponding access path to a first voltage in response to input write data having a first value and to a second voltage in response to the input write data having a second value; and a node setting circuit that maintains second electrodes of the PMCs at a substantially constant third voltage while write circuits couple the access paths to the first or second voltages.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.