Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same
US8278221B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2011 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Jul 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76816
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming hard mask employs a double patterning technique. A first hard mask layer is formed on a substrate, and a first sacrificial pattern is formed on the first hard mask layer by photolithography. Features of the first sacrificial pattern are spaced from one another by a first pitch. A second hard mask layer is then formed conformally on the first sacrificial pattern and the first hard mask layer so as to delimit recesses between adjacent features of the first sacrificial pattern. Upper portions of the second hard mask layer are removed to expose the first sacrificial pattern, and the exposed first sacrificial pattern and the second sacrificial pattern are removed. The second hard mask layer and the first hard mask layer are then etched to form a hard mask composed of residual portions of the first hard mask layer and the second hard mask layer. A fine pattern of a semiconductor device, such as a trench isolation region or a pattern of contact holes, can be formed using the hard mask as an etch mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.