Reduction of threshold voltage instabilities in a MOS transistor
US8283707B2 · kind B2 · utility
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22Claims
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Key dates
| Filing date | Mar 6, 2007 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Jan 11, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS transistor includes an etch stop layer presenting a density of less than a determined threshold value, below which the material of said stop layer is permeable to molecules of dihydrogen and/or water. The material may comprise a nitride. A material used for the etch stop layer preferably has a density value of less than about 2.4 g/cm3.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.