Multi-port memory having a variable number of used write ports
US8284593B2 · kind B2 · utility
31Cited by
3References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 14, 2010 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Dec 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-port memory is operated according to a method. Data is written, in a first mode, to a storage node of a memory cell from a first port through a first conductance. The first mode is characterized by a power supply voltage being applied at a power node at a first level. Data is written, in a second mode, to the storage node of the memory cell simultaneously from the first port through the first conductance and a second port through a second conductance. The second mode is characterized by the power supply voltage being applied at the power node at a second level different from the first level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.