Three-dimensional package and method of making the same
US8288853B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2009 |
| Grant date | Oct 16, 2012 |
| Priority date | — |
| Expiry date | Apr 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package comprises a first unit including a semiconductor body, a hole, an isolation layer, a conductive layer and a solder. The semiconductor body has a first surface having a pad and a protection layer exposing the pad. The hole penetrates the semiconductor body. The isolation layer is disposed on the side wall of the hole. The conductive layer covers the pad, a part of the protection layer, and the isolation layer. The lower end of the conductive layer extends to below a second surface of the semiconductor body. The solder is disposed in the hole, and is electrically connected to the pad via the conductive layer. A second unit similar to the first unit and stacked thereon includes a lower end of a second conductive layer that extends to below a second surface of a second semiconductor body and contacts the upper end of the first solder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.