Patent · US Active

Critical dimension for trench and vias

US8293545B2 · kind B2 · utility

1Cited by

3References

22Claims

0Family size

Assignee

GlobalFoundries Singapore Pte. Ltd. · SG

Inventors

Hai Cong · Singapore, SG
Yan Shan Li · Toronto, CA
Chun Hui Low · Kluang, MY
Yelehanka Ramachandramurthy Pradeep · Singapore, SG
Liang-Choo Hsia · Singapore, SG

Key dates

Filing date	Oct 29, 2007
Grant date	Oct 23, 2012
Priority date	—
Expiry date	Feb 29, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Test structures including test trenches are used to define critical dimension of trenches in a via level of an integrated circuit to produce substantially the same depth. The trenches are formed at the periphery of the IC to serve as guard rings.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.