Chun Hui Low
11Patents
6h-index
24Co-inventors
62Inventor score
Filing activity: Apr 12, 1999 → Jun 17, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6228727A | Method to form shallow trench isolations with rounded corners and reduced trench oxide recess | Electricity | 102 | Expired |
| US6265302A | Partially recessed shallow trench isolation method for fabricating borderless contacts | Electricity | 42 | Expired |
| US6350661B2 | Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts | Electricity | 24 | Expired |
| US6271133A | Optimized Co/Ti-salicide scheme for shallow junction deep sub-micron device fabrication | Emerging Cross-Sectional Technologies | 17 | Expired |
| US6297126A | Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts | Electricity | 13 | Expired |
| US7045455B2 | Via electromigration improvement by changing the via bottom geometric profile | Electricity | 7 | Expired |
| US7352064B2 | Multiple layer resist scheme implementing etch recipe particular to each layer | Electricity | 4 | Expired |
| US8354347B2 | Method of forming high-k dielectric stop layer for contact hole opening | Electricity | 4 | Active |
| US8293545B2 | Critical dimension for trench and vias | Electricity | 1 | Active |
| US7781895B2 | Via electromigration improvement by changing the via bottom geometric profile | Electricity | 0 | Active |
| US7691739B2 | Via electromigration improvement by changing the via bottom geometric profile | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.