Gap processing
US8293617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2011 |
| Grant date | Oct 23, 2012 |
| Priority date | — |
| Expiry date | Oct 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0228
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Among various methods, devices, and apparatuses, a number of methods are provided for forming a gap between circuitry. One such method includes depositing a first oxide precursor material on at least two conductive lines having at least one gap between the at least two conductive lines, and forming a breadloaf configuration with the first oxide precursor material on a top of each of the at least two conductive lines that leaves a space between a closest approach of at least two adjacent breadloaf configurations. The method also includes depositing a second oxide precursor material over the first oxide precursor material, where depositing the second oxide precursor material results in closing the space between the closest approach of the at least two adjacent breadloaf configurations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.