Use of dilute steam ambient for improvement of flash devices
US8294192B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2011 |
| Grant date | Oct 23, 2012 |
| Priority date | — |
| Expiry date | Jun 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/681
Abstract
A flash memory integrated circuit and a method for fabricating the same. A gate stack includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. Additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. The interface can be formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability. Oxide in an upper storage dielectric layer is enhanced in the dilute steam oxidation. The thin oxide layers serve as diffusion paths to enhance uniform distribution of OH species across the buried interfaces being oxidized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.