Patent · US Active

Buffer management in vector graphics hardware

US8294731B2 · kind B2 · utility

2Cited by

15References

23Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventor

Mika Tuomi · Noormarkku, FI

Key dates

Filing date	Nov 15, 2005
Grant date	Oct 23, 2012
Priority date	—
Expiry date	Sep 19, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG06T11/40
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A graphics processor or a graphics block for use in a processor includes a type buffer used for determining if a currently processed pixel requires further processing. Each pixel has a number of sub-pixels and each sub-pixel line includes at least one counter that is stored in an edge buffer. A limited edge buffer that can store edge buffer values in a limited range can be employed. Each buffer can include information regarding the whole screen or a portion of thereof. The edge buffer also can be an external or internal buffer, and when implemented internally, the graphics processor or graphics block need not employ a bi-directional bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.