On-chip cooling systems for integrated circuits
US8298966B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2010 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Oct 11, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and methods for forming the same. A semiconductor chip includes a substrate and a transistor. The chip includes N interconnect layers on the substrate, N being a positive integer. The chip includes a cooling pipes system inside the N interconnect layers. The cooling pipes system does not include any solid or liquid material. Given any first point and any second point in the cooling pipes system, there exists a continuous path which connects the first and second points and which is totally within the cooling pipes system. A first portion of the cooling pipes system overlaps the transistor. A second portion of the cooling pipes system is higher than the substrate and lower than a top interconnect layer. The second portion is in direct physical contact with a surrounding ambient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.