Diffusion regions having different depths
US8299564B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2009 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Jan 15, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/017
Abstract
Formation of transistors, such as, e.g., PMOS transistors, with diffusion regions having different depths for equalization of performance among transistors of an integrated circuit is described. Shallow-trench isolation structures are formed in a substrate formed at least in part of silicon for providing the transistors with at least substantially equivalent channel widths and lengths. A series of masks and etches is performed to form first recesses and second recesses defined in the silicon having different depths and respectively associated with first and second transistors. The second recesses are deeper than the first recesses. A silicon germanium film is formed in the first recesses and the second recesses. The silicon germanium film in the second recesses is thicker than the silicon germanium film in the first recesses, in order to increase performance of the second transistor so it is closer to the performance of the first transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.