Product chips and die with a feature pattern that contains information relating to the product chip
US8299609B2 · kind B2 · utility
2Cited by
11References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2012 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Jan 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Product chips and die that include a pattern of features formed in a metallization level of a back-end-of-line (BEOL) wiring structure. The features in the pattern contain information relating to the die, such as a unique identifier that includes a wafer identification used to fabricate the die and a product chip location for the die on a wafer. The features may be imaged with the assistance of a beam of electromagnetic radiation that penetrates into a packaged die and is altered by the presence of the features in a way that promotes imaging.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.