Inventor · Jericho, VT, US

John C. Malinowski

15Patents
7h-index
40Co-inventors
66Inventor score

Filing activity: Apr 9, 1992 → Oct 8, 2013

Most-cited inventions

PatentTitleAreaCited byStatus
US5204280A Process for fabricating multiple pillars inside a dram trench for increased capacitor surface Emerging Cross-Sectional Technologies 64 Expired
US6656815B2 Process for implanting a deep subcollector with self-aligned photo registration marks Electricity 18 Expired
US8565510B2 Methods for reading a feature pattern from a packaged die Electricity 17 Active
US8563336B2 Method for forming thin film resistor and terminal bond pad simultaneously Electricity 15 Active
US6259148A Modular high frequency integrated circuit structure Electricity 12 Expired
US7067914B2 Dual chip stack method for electro-static discharge protection of integrated circuits Electricity 12 Expired
US8187897B2 Fabricating product chips and die with a feature pattern that contains information relating to the product chip Electricity 11 Active
US7053460B2 Multi-level RF passive device Electricity 7 Expired
US6413868B1 Modular high frequency integrated circuit structure Electricity 6 Expired
US7025891B2 Method of polishing C4 molybdenum masks to remove molybdenum peaks Chemistry; Metallurgy 6 Expired
US8729664B2 Discontinuous guard ring Electricity 5 Active
US9230921B2 Self-healing crack stop structure Electricity 4 Active
US6656375B1 Selective nitride: oxide anisotropic etch process Electricity 2 Expired
US8299609B2 Product chips and die with a feature pattern that contains information relating to the product chip Electricity 2 Active
US9287345B2 Semiconductor structure with thin film resistor and terminal bond pad Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.