Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects
US8299617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2010 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Aug 12, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a metal layer on the top of a planarized interconnect layer, the interconnect layer having an interlayer dielectric (ILD) with a top that is planar with the top of an electrically conductive interconnect. In one embodiment of the invention, the method includes reacting the metal layer with the ILD to form a metal oxide layer on the top of the ILD. At the same time, the metal layer will not be significantly oxidized by the electrically conductive interconnect, thus forming a metal barrier on the electrically conductive interconnect to improve electromigration performance. The metal barrier and metal oxide layer together comprise a protective layer. A second ILD may be subsequently formed on the protective layer, and the protective layer may act an etch-stop during a subsequent etch of the second ILD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.