Method for limiting current and circuit therefor
US8300374B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2008 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Mar 12, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor component that includes a current limit circuit and a method for limiting current in the semiconductor component. An input/output pin is connected to the gate of a transistor and a control resistor is connected between the gate of the transistor and its source. One terminal of the control resistor is connected to the input/output pin and the other terminal is connected to another input/output pin. A current source is connected to the input/output pin. A reference voltage is generated between the two input/output pins and compared with a drain-source voltage that is between one of the two input/output pins and another input/output pin. A control voltage is set in accordance with the comparison. The control voltage then controls the voltage on another of the pins that is not common to the reference voltage and to the drain-source voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.