Sacrificial CMP etch stop layer
US8304342B2 · kind B2 · utility
2Cited by
14References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2006 |
| Grant date | Nov 6, 2012 |
| Priority date | — |
| Expiry date | Oct 31, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chemical mechanical polishing (CMP) stop layer is implemented in a semiconductor fabrication process. The CMP stop layer, among other things, mitigates erosion of sidewall spacers during semiconductor fabrication and adverse effects associated therewith.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.