Patent · US Active

At-speed bitmapping in a memory built-in self-test by locking an N-TH failure

US8307249B2 · kind B2 · utility

0Cited by

2References

23Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Markus Seuring · Stuttgart, DE
Kay Hesse · Dresden, DE
Kai Eichhorn · Hohenstein-Ernstthal, DE

Key dates

Filing date	Feb 22, 2010
Grant date	Nov 6, 2012
Priority date	—
Expiry date	Feb 24, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/44
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a sophisticated semiconductor device including a large memory portion, a built-in self-test circuitry comprises a failure capturing logic that allows the capturing of a bitmap at a given instant in time without being limited to specific operating conditions in view of interfacing with external test equipment. Thus, although pipeline processing may be required due to the high speed operation during the self-test, reliable capturing of the bitmap may be achieved while maintaining high fault coverage of the test algorithm under consideration.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.