Methods of forming electrically insulative materials, methods of forming low k dielectric regions, and methods of forming semiconductor constructions
US8309424B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 9, 2011 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Apr 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76885
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments include methods of forming low k dielectric regions between electrically conductive lines. A construction may be formed to have a plurality of spaced apart electrically conductive lines, and to have sacrificial material between the electrically conductive lines. The sacrificial material may be removed. Subsequently, electrically insulative material may be deposited over and between the lines. The deposition of the insulative material may occur under conditions in which bread-loafing of the insulative material creates bridges of the insulative material across gas-filled gaps between the lines. The gas-filled gaps may be considered to correspond to low k dielectric regions between the electrically conductive lines. In some embodiments the sacrificial material may be carbon. In some embodiments, the deposited insulative material may be a low k dielectric material, and in other embodiments the deposited insulative material may not be a low k dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.