Data processor device having trace capabilities and method
US8312253B2 · kind B2 · utility
28Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2008 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | May 18, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/348
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In response to determining an event has occurred, information is stored at a trace buffer of an integrated circuit. When the trace buffer is full, execution of instructions at a CPU is halted to allow the trace buffer information to be accessed at an external interface to the integrated circuit device. The CPU is continually halted as the trace buffer is filled to facilitate retrieving all information written to the trace buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.