Device and method for testing and for diagnosing digital circuits
US8312332B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2006 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Jul 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/40
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test apparatus includes a test input signal generator that generates a test input signal of word width N, and terminals that connect to inputs and outputs of an electrical circuit to be tested. The electrical circuit includes N digital test inputs and M digital test outputs. The terminals for the test inputs are connected to the test input signal and an electrical circuit is driven such that it outputs at its test outputs data with a macro clock cycle T of length L as test response. A compactor includes M inputs that are connected to the terminals for the test outputs of the circuit to be tested. The compactor compacts the test response with a micro clock cycle t of length l and outputs a data word of width m, where the length L is at least twice as large as the length l.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.