Semiconductor device having increased switching speed
US8314002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2005 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Apr 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
Abstract
A semiconductor device is formed in a thin float zone wafer. Junctions are diffused into the top surface of the wafer and the wafer is then reduced in thickness by removal of material from its bottom surface. A weak collector is then formed in the bottom surface by diffusion of boron (for a P type collector). The weak collector is then formed or activated only over spaced or intermittent areas. This is done by implant of the collector impurity through a screening mask; or by activating only intermittent areas by a laser beam anneal in which the beam is directed to anneal only preselected areas. The resulting device has an effective very low implant dose, producing a reduced switching energy and increased switching speed, as compared to prior art weak collector/anodes and life time killing technologies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.