Patent · US Active

Methods involving memory with high dielectric constant antifuses adapted for use at low voltage

US8314023B2 · kind B2 · utility

0Cited by
17References
11Claims
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Key dates

Filing dateFeb 6, 2009
Grant dateNov 20, 2012
Priority date
Expiry dateMar 24, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods involve using a memory array having memory cells comprising a diode and an antifuse, in which the antifuse is made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and in which the diode is made of a material having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.