Silicon-on-insulator chip having multiple crystal orientations
US8319285B2 · kind B2 · utility
3Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2005 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Dec 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon-on-insulator device having multiple crystal orientations is disclosed. In one embodiment, the silicon-on-insulator device includes a substrate layer, an insulating layer disposed on the substrate layer, a first silicon layer, and a strained silicon layer. The first silicon layer has a first crystal orientation and is disposed on a portion of the insulating layer, and the strained silicon layer is disposed on another portion of the insulating layer and has a crystal orientation different from the first crystal orientation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.