Electronic package having down-set leads and method
US8319323B2 · kind B2 · utility
8Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2004 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | May 30, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a leadless package includes down-set conductive leads having base portions. The base portions include stand-offs that attach to electrodes on an electronic chip using, for example, a solder die attach material. An optional encapsulating layer covers portions of the down-set conductive leads and portions of the electronic chip while leaving pad portions of the down-set conductive leads and a surface of the electronic chip exposed. The pad portions and the surface of the electronic chip are oriented to attach to a next level of assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.