Determining and using dynamic voltage scaling mode
US8319544B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 16, 2010 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Feb 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/0022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mode determination apparatus in a semiconductor apparatus includes a first condition detection block configured to generate a first condition signal in response to a clock enable signal activated when the semiconductor apparatus enters a dynamic voltage scaling mode, a second condition detection block configured to generate a second condition signal in response to an external high voltage in the dynamic voltage scaling mode, the external high voltage having a voltage level in the dynamic voltage scaling mode different from a voltage level in a normal mode, and a signal processing block configured to generate a dynamic voltage scaling mode signal in response to the first condition signal and the second condition signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.