High density spin-transfer torque MRAM process

US8324698B2 · kind B2 · utility

Assignee

• MagIC Technologies, Inc. · US

Inventors

• Tom Zhong · Saratoga, US
• Chyu-Jiuh Torng · Pleasanton, US
• Rongfu Xiao · Dublin, US
• Adam Zhong · Milpitas, US
• Wai-Ming J. Kan · San Ramon, US
• Daniel Liu · San Jose, US

Key dates

• Filing date: Jan 4, 2011
• Grant date: Dec 4, 2012
• Expiry date: Jan 4, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/01

Abstract

A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.