Reduced capacity carrier, transport, load port, buffer system
US8328495B2 · kind B2 · utility
11Cited by
43References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2009 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Sep 23, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67775
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor workpiece processing system having at least one processing apparatus for processing workpieces, a primary transport system, a secondary transport system and one or more interfaces between first transport system and second transport system. The primary and secondary transport systems each have one or more sections of substantially constant velocity and in queue sections communicating with the constant velocity sections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.