Shifter with all-one and all-zero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result
US8332453B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2008 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Oct 11, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shifter that includes a plurality of shift stages positioned within the shifter, and receiving and shifting input data to generate a shifted result, and a detection circuit coupled at an input of a final shift stage of the plurality of shifters, in a final stage within the shifter. The detection circuit receives a partially shifted vector at the input of the final shift stage along with a predetermined shift amount, and performing an all-one or all-zero detection operation using a portion of the partially shifted vector and the predetermined shift amount, in parallel, to a shifting operation performed by the final shift stage to generate the shifted result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.