Package-on-package system with through vias and method of manufacture thereof
US8334601B2 · kind B2 · utility
1Cited by
15References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2011 |
| Grant date | Dec 18, 2012 |
| Priority date | — |
| Expiry date | Jun 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of a package-on-package system includes: providing a package substrate; attaching a semiconductor die to the package substrate; forming an encapsulant around the semiconductor die to have a bottom exposed surface coplanar with a bottom surface of the package substrate and to have a top exposed surface with through openings extending therefrom through the bottom exposed surface; and creating through vias by applying solder into the through openings, the through vias coplanar with the bottom exposed surface of the encapsulant and coplanar with the top exposed surface of the encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.