Patent · US Active

Method of reducing erosion of a metal cap layer during via patterning in semiconductor devices

US8338293B2 · kind B2 · utility

0Cited by

4References

16Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Christin Bartsch · Neustadt in Sachsen, DE
Daniel Fischer · Furth, DE
Matthias Schaller · Dresden, DE

Key dates

Filing date	May 17, 2011
Grant date	Dec 25, 2012
Priority date	—
Expiry date	May 17, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/76883
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.