Multiple die face-down stacking for two or more die
US8338963B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2011 |
| Grant date | Dec 25, 2012 |
| Priority date | — |
| Expiry date | Nov 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic assembly is disclosed that comprises a substrate having first and second openings, a first microelectronic element and a second microelectronic element in a face-down position. The first element has an active surface facing the front surface of the substrate and bond pads aligned with the first opening, a rear surface remote therefrom, and an edge extending between the front and rear surfaces. The second microelectronic element has a front surface facing the first microelectronic element and projecting beyond an edge of the first microelectronic element, and bond pads at the front surface of the second microelectronic element aligned with the second opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.