System-on-chip with master/slave debug interface

US8347158B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventor

• Albrecht Mayer · Deisenhofen, DE

Key dates

• Filing date: Jun 20, 2012
• Grant date: Jan 1, 2013
• Expiry date: Jun 20, 2032

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F13/18
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A System-on-Chip (SOC) debugging system comprising a plurality of SOCs connected to a shared bus, at least one of the plurality of SOCs being a master SOC and comprising a master/slave debug interface, wherein the master/slave debug interface is a bidirectional debug interface configured to initiate transactions on the shared bus and operable to send and receive debug data between the SOCs, wherein the debug data comprises trace data.