Asymmetric MIM capacitor for DRAM devices

US8349696B1 · kind B1 · utility

Assignee

• INTERMOLECULAR, INC. · US

Inventors

• Hanhong Chen · Milpitas, US
• Hiroyuki Ode · Kure, JP

Key dates

• Filing date: Aug 1, 2011
• Grant date: Jan 8, 2013
• Expiry date: Aug 1, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/30

Abstract

A bilayer second electrode for a MIM DRAM capacitor is formed wherein the layer of the electrode that is in contact with the dielectric layer (i.e. bottom layer) has a composition that is resistant to oxidation during subsequent anneal steps and have rutile templating capability. Examples include SnO2 and RuO2. The capacitor stack including the bottom layer is subjected to a PMA treatment to reduce the oxygen vacancies in the dielectric layer and reduce the interface states at the dielectric/second electrode interface. The other component of the bilayer (i.e. top layer) is a high work function, high conductivity metal or conductive metal compound.