Power MOSFET and its edge termination
US8354711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2010 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Apr 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Improved MOSFET structures and processes, where multiple polysilicon embedded regions are introduced into the n+ source contact area. A top poly Field Plate is used to shield the electric field from penetrating into the channel, so that a very short channel can be used without jeopardizing the device drain-source leakage current. A bottom poly Field Plate is used to modulate the electric field distribution in the drift region such that a more uniform field distribution can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.