Error scanning in flash memory
US8356216B2 · kind B2 · utility
11Cited by
17References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2012 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Jan 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/106
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments include methods, apparatus, and systems to scan at least a portion of a memory device for potential errors when a condition for scanning is met. The condition may be dependent on one or more of a number of read operations, a number of write operations, time, and others. Other embodiments including additional methods, apparatus, and systems are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.